It's note worthy to mention, HP also produced a RISC processor in the 1980's which went on to power some of their commercial computer systems. It was also used in a few MPP (Massively Parallel Processor) computers in the mid/later 1980 to the late 1990s.Īs someone previously mentioned, the code was easy to learn and once you learned it, it was easy to move on to more "complex" RISC instruction based processors such as the Alpha, SPARC, ARM, IBM Power PC to name a few. SGI had several computer systems built upon this processor family, such as the Onyx and several others. The MIPS CPU is taught as the "basic" RISC architecture processor because it was one of the first very successful RISC processors. (Although as I pointed out you may actually wind up contending with MIPS anyway.) This will prepare your mind for the RISC approach and make it easier for you to quickly pick up ARM (my recommended second) or SPARC or any other RISC architecture out there even if you never use MIPS directly. MIPS is the purest implementation of RISC concepts that's in actual real-world use and you will be forced to contend with the RISC way of thinking and only the RISC way of thinking (for the most part) while you solve your problems with it. Other processors thought of as RISC (ARM, SPARC, Alpha, etc.) are more pragmatic and complicated, obfuscating RISC concepts with some more CISC-like enhancements for better performance or other benefits.įinally, to answer your final question: I would recommend learning MIPS for the same reason that I recommend people learning OOP pick up Eiffel, people learning functional pick up Haskell and so on. For pedagogical purposes it is probably the best real-world architecture to show the nature of RISC, along with its warts. It is a small, relatively pure RISC implementation that is easily understood and that illustrates RISC concepts well. (Well, except Itanium which is basically stillborn tech that's not RISC nor CISC.)Īnswering now your first question: the reason that MIPS features so prominently in books is that it is almost a perfect exemplar of a RISC system. I don't know enough about the other architectures mentioned to make any useful comment. SPARC is very pricey, but, to be fair, very fast. What ARM brings over MIPS is a much better power/performance ratio, if memory serves, and a more flexible set of options in constructing cores. What they bring to the table over ARM is a competitive price/performance ratio and 64-bit capabilities. They're also increasingly appearing in small home computing devices in Asian marketplaces (Lemote, for example). They're frequently the processors used in things like routers and other small computing appliances like that. Your questions are good ones.Īnswering your second question: yes, MIPS processors are still in use. If you're experienced in the x86(-64) world, then yes the move to a RISC processor is a good sideways move to keep your mind opening. I have not studied 64-bit ARM yet but it is likely to have most of the positive qualities of MIPS, being essentially a clean-slate design. Itanium isn't RISC so it's hard to say anything, besides don't learn Itanium. So if you learn MIPS, you will be able to transfer 100% of that knowledge to other RISCs (give or take delay slots), but you still have to learn about lots of odd instructions on PPC, a whole ton-o-junk on 32-bit ARM, and register windows on SPARC. SPARC has a few odd features and Itanium is composed entirely of odd features. PowerPC and (32-bit) ARM have so many extra instructions (even a few operating modes, 32-bit ARM especially) that you could almost call them CISC. (Ironically, Apple, their #1 customer, were the first to market with ARM v8.) Imagination Technologies acquired MIPS in late 2012. Update as of 2013: Broadcom does not appear to have introduced new MIPS products since 2006, and Cavium appears to be transitioning to 64-bit ARM v8. One thing that MIPS does and ARM doesn't is 64-bit. See MIPS Imagination Technologies' website for more info. Cavium Networks and Raza Microelectronics Broadcom are two large MIPS chipmakers.
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